J10 is a 50 pin IDC connector which connects with one of the two 48 bit DIO cables from the National Instruments 6508/DIO-96 card. Either cable (upper or lower bits) of the DIO-96 may be used. This connector also supplies 5 volt power to the board. Two LS48 boards could be used to provide 80 bits of level shifted output from one DIO-96 card.

Ports A thru D are uncommitted, level shifted, digital output bits. Each 8 bit port may be reconfigured as an input, but the input direction is not level shifted. Port E is also a level shifted output port, where some of the bits have predefined uses if using the on-board CPLD, EEPROM, voltage monitor, or bidirectional operation. The last port (port F) is not level shifted, and is intended to be used as an input port.

Each of these ports is buffered with a 74LVC245 driver, providing an output voltage range from 1.65 volts to 3.6 volts, based on the power supply voltage. Ports A&B share one power bus (V_BUF12) and C&D share another (V_BUF34). Each of these port pairs can be connected to separate power supplies to provide two different digital output levels. Each output port has a resistor pack in series with the output bits.

When bidirectional operation is desired, it is best handled by using two DIO ports for each 8 bits of bidirectional I/O. One port is configured as a output and the other as an input. Some jumper connections may be required

This port is buffered with a 74LVC245 driver, and interface wise, is identical to ports A thru D. The power bus (V_BUF5) is separate from the other ports.

Port E has dedicated bits which may be needed for CPLD control, output enable control (of port A & C), serial EEPROM, and on-board voltage monitoring. This port must be configured as an output if any of these features is to be used. This port include functionalities on SPI I/O, OE control, CPLD connection, and etc

One 8 bit input port is provided. The input port is wired directly to the input of the N.I. DIO card, there is no level shifting. Any voltage from 2.0 to 5.0 volts will be seen as a logical high. Since this is a direct connection, this port could be used as a 5 volt level output port.

Port F has dedicated bits which may be needed for CPLD control, serial EEPROM, and on-board voltage monitoring. This port must be configured as an input if any of these features is to be used. This port include functionalities on SPI I/O, CPLD connection, and etc

An inverting open collector driver is provided on the LS48 board. This is independent of everything else on the board. An input connector (J11) may be connected (via ribbon cable) to any of the output connectors on this board (J1a through J4a, J5, or J6 if configured as an output).

• Input Connector
  

  Two different power supply voltages may be connected to the input connector (J8: V_EXT1_IN & V_EXT2_IN) from external power supplies. These voltages go to the jumper matrix, where they are routed to other parts of the board. There is no particular restriction on how these inputs are used.

• Internal Voltage Regulator
  

  There is an on-board 3.3V voltage regulator which gets its power from the National Instruments 5V supply line. This may be used to power low current circuits. All of circuits on this interface board may be powered from this supply, with about 200mA left over for powering a UUT. Another 200mA may be freed if the CPLD is not needed.

• Power Jumper Matrix
  

  This board attempts to provide very flexible power routing by using a jumper matrix which needs to be wired for a specific application. Three power sources are accessible: the two external power supply inputs (V_EXT1_IN and V_EXT2_IN), and the internal voltage regulator (D3_3V). There are three destinations for power: port A&B level shifter buffers (V_BUF12), port C&D level shifter buffers (V_BUF34), and port E level shifter buffer (V_BUF5).

• Jumpers
  

  JP5 – This allows the output of the on-board 3.3V voltage regulator to be separated from the D3_3V power bus. This would normally be done only when powering the D3_3V bus from an external power supply.

This board uses a four input, 10 bit ADC to verify the on-board power supply voltages. The voltage monitor can measure from 0 to 8.2 volts, with an precision of +/-8 mV, and a full scale accuracy of +/-170mV (+/-2%). Larson Automation provides CVI compatible function calls to read voltage monitor through DIO port E.

A serial EEPROM is available on-board. This can be used to store fixture model, revision, serial number, etc. or to save fixture specific calibration data. This uses an Atmel AT25040 512 byte serial EEPROM for storage. Larson Automation provides CVI compatible function calls to read and write this memory through DIO port E.

This board includes a Xilinx XC9572XL in-circuit programmable CPLD. This chip is not required for basic operation of the board, but can be very useful in extending its capabilities. Many of the DIO output bits are routed to this chip, but they may be ignored if not needed. DIO input bits may be used by installing resistors to make the connections between the CPLD and the input port. An oscillator socket exists at U6 to provide a clock to the CPLD.

• Standard Program
  

  Larson Automation provides a standard program for the CPLD, which provides the following features:

  • Four wire SPI port communication with host software
  • Board ID code for automatic software configuration
  • SPI port multiplexing for EEPROM and voltage monitor
  • Reads port direction configuration
  • Controls output enables of output ports A thru D
  • Additional 8 bit bidirectional 3.3 volt port (J7)
  • Test LED, toggled from host software

In its most basic form, the CPLD (U10), oscillator (U6) and SEEPROM (U9) are not installed.

The National Instruments DIO cards are not well optimized for bi-directional transfer, especially when level shifting is involved. The best way to accomplish this is to use two ports of the DIO card: one input and one output. The two ports are wired together so that the input port is always monitoring the bi-directional bus, and the output port output enable is gated by the bus write signal.

The application software will see the bus as two separate ports: a write port and a read port, and a third port for control.

The LS48 board was designed to be able to control SPI type serial devices from any of the output ports (port A thru E). SPI is a very simple interface which uses four wires (not counting power and ground) for device control. Each SPI device will have its own dedicated enable line, and the other three wires are common to all SPI devices.